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<div class="title">Z80.h</div>  </div>
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<a href="_z80_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;<span class="comment">/*</span></div><div class="line"><a name="l00002"></a><span class="lineno">    2</span>&#160;<span class="comment"> Z80 emulator code derived from Lin Ke-Fong source. Copyright says:</span></div><div class="line"><a name="l00003"></a><span class="lineno">    3</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00004"></a><span class="lineno">    4</span>&#160;<span class="comment"> Copyright (c) 2016, 2017 Lin Ke-Fong</span></div><div class="line"><a name="l00005"></a><span class="lineno">    5</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00006"></a><span class="lineno">    6</span>&#160;<span class="comment"> This code is free, do whatever you want with it.</span></div><div class="line"><a name="l00007"></a><span class="lineno">    7</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00008"></a><span class="lineno">    8</span>&#160;<span class="comment"> 2020 adapted by Fabrizio Di Vittorio for fabgl ESP32 library</span></div><div class="line"><a name="l00009"></a><span class="lineno">    9</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00010"></a><span class="lineno">   10</span>&#160;</div><div class="line"><a name="l00011"></a><span class="lineno">   11</span>&#160;</div><div class="line"><a name="l00012"></a><span class="lineno">   12</span>&#160;<span class="preprocessor">#pragma once</span></div><div class="line"><a name="l00013"></a><span class="lineno">   13</span>&#160;</div><div class="line"><a name="l00014"></a><span class="lineno">   14</span>&#160;</div><div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;<span class="preprocessor">#include &lt;stdint.h&gt;</span></div><div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;</div><div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;</div><div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;</div><div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="keyword">namespace </span><a class="code" href="namespacefabgl.html">fabgl</a> {</div><div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;</div><div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;</div><div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="comment">/* Define this macro if the host processor is big endian. */</span></div><div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;</div><div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;<span class="comment">/* #define Z80_BIG_ENDIAN */</span></div><div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;</div><div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;<span class="comment">/* Emulation can be speed up a little bit by emulating only the documented</span></div><div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;<span class="comment"> * flags.</span></div><div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;</div><div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;<span class="comment">/* #define Z80_DOCUMENTED_FLAGS_ONLY */</span></div><div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;</div><div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;<span class="comment">/* HALT, DI, EI, RETI, and RETN instructions can be catched. When such an</span></div><div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;<span class="comment"> * instruction is catched, the emulator is stopped and the PC register points</span></div><div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;<span class="comment"> * at the opcode to be executed next. The catched instruction can be determined</span></div><div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;<span class="comment"> * from the Z80_STATE&#39;s status value. Keep in mind that no interrupt can be</span></div><div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;<span class="comment"> * accepted at the instruction right after a DI or EI on an actual processor.</span></div><div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;</div><div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;<span class="comment">/*</span></div><div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;<span class="comment"> #define Z80_CATCH_HALT</span></div><div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;<span class="comment"> #define Z80_CATCH_DI</span></div><div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;<span class="comment"> #define Z80_CATCH_EI</span></div><div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;<span class="comment"> #define Z80_CATCH_RETI</span></div><div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;<span class="comment"> #define Z80_CATCH_RETN</span></div><div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;</div><div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;<span class="comment">/* Undefined 0xed prefixed opcodes may be catched, otherwise they are treated</span></div><div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;<span class="comment"> * like NOP instructions. When one is catched, Z80_STATUS_ED_UNDEFINED is set</span></div><div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;<span class="comment"> * in Z80_STATE&#39;s status member and the PC register points at the 0xed prefix</span></div><div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;<span class="comment"> * before the undefined opcode.</span></div><div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;</div><div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;<span class="comment">/* #define Z80_CATCH_ED_UNDEFINED */</span></div><div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;</div><div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;<span class="comment">/* By defining this macro, the emulator will always fetch the displacement or</span></div><div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;<span class="comment"> * address of a conditionnal jump or call instruction, even if the condition</span></div><div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;<span class="comment"> * is false and the fetch can be avoided. Define this macro if you need to</span></div><div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;<span class="comment"> * account for memory wait states on code read.</span></div><div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;</div><div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;<span class="comment">/* #define Z80_FALSE_CONDITION_FETCH */</span></div><div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;</div><div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;<span class="comment">/* It may be possible to overwrite the opcode of the currently executing LDIR,</span></div><div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;<span class="comment"> * LDDR, INIR, or OTDR instruction. Define this macro if you need to handle</span></div><div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;<span class="comment"> * these pathological cases.</span></div><div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;</div><div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;<span class="comment">/* #define Z80_HANDLE_SELF_MODIFYING_CODE */</span></div><div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;</div><div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;<span class="comment">/* For interrupt mode 2, bit 0 of the 16-bit address to the interrupt vector</span></div><div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;<span class="comment"> * can be masked to zero. Some documentation states that this bit is forced to</span></div><div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;<span class="comment"> * zero. For instance, Zilog&#39;s application note about interrupts, states that</span></div><div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;<span class="comment"> * &quot;only 7 bits are required&quot; and &quot;the least significant bit is zero&quot;. Yet,</span></div><div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;<span class="comment"> * this is quite unclear, even from Zilog&#39;s manuals. So this is left as an</span></div><div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;<span class="comment"> * option.</span></div><div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;</div><div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;<span class="comment">/* #define Z80_MASK_IM2_VECTOR_ADDRESS */</span></div><div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;</div><div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;</div><div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;</div><div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;</div><div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;</div><div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;</div><div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;<span class="comment">/* If Z80_STATE&#39;s status is non-zero, the emulation has been stopped for some</span></div><div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;<span class="comment"> * reason other than emulating the requested number of cycles.</span></div><div class="line"><a name="l00095"></a><span class="lineno">   95</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00096"></a><span class="lineno">   96</span>&#160;</div><div class="line"><a name="l00097"></a><span class="lineno">   97</span>&#160;<span class="keyword">enum</span> {</div><div class="line"><a name="l00098"></a><span class="lineno">   98</span>&#160;</div><div class="line"><a name="l00099"></a><span class="lineno">   99</span>&#160;  Z80_STATUS_HALT = 1,</div><div class="line"><a name="l00100"></a><span class="lineno">  100</span>&#160;  Z80_STATUS_DI,</div><div class="line"><a name="l00101"></a><span class="lineno">  101</span>&#160;  Z80_STATUS_EI,</div><div class="line"><a name="l00102"></a><span class="lineno">  102</span>&#160;  Z80_STATUS_RETI,</div><div class="line"><a name="l00103"></a><span class="lineno">  103</span>&#160;  Z80_STATUS_RETN,</div><div class="line"><a name="l00104"></a><span class="lineno">  104</span>&#160;  Z80_STATUS_ED_UNDEFINED,</div><div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;  Z80_STATUS_PREFIX</div><div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;</div><div class="line"><a name="l00107"></a><span class="lineno">  107</span>&#160;};</div><div class="line"><a name="l00108"></a><span class="lineno">  108</span>&#160;</div><div class="line"><a name="l00109"></a><span class="lineno">  109</span>&#160;</div><div class="line"><a name="l00110"></a><span class="lineno">  110</span>&#160;</div><div class="line"><a name="l00111"></a><span class="lineno">  111</span>&#160;<span class="comment">/* The main registers are stored inside Z80_STATE as an union of arrays named</span></div><div class="line"><a name="l00112"></a><span class="lineno">  112</span>&#160;<span class="comment"> * registers. They are referenced using indexes. Words are stored in the</span></div><div class="line"><a name="l00113"></a><span class="lineno">  113</span>&#160;<span class="comment"> * endianness of the host processor. The alternate set of word registers AF&#39;,</span></div><div class="line"><a name="l00114"></a><span class="lineno">  114</span>&#160;<span class="comment"> * BC&#39;, DE&#39;, and HL&#39; is stored in the alternates member of Z80_STATE, as an</span></div><div class="line"><a name="l00115"></a><span class="lineno">  115</span>&#160;<span class="comment"> * array using the same ordering.</span></div><div class="line"><a name="l00116"></a><span class="lineno">  116</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00117"></a><span class="lineno">  117</span>&#160;</div><div class="line"><a name="l00118"></a><span class="lineno">  118</span>&#160;<span class="preprocessor">#ifdef Z80_BIG_ENDIAN</span></div><div class="line"><a name="l00119"></a><span class="lineno">  119</span>&#160;</div><div class="line"><a name="l00120"></a><span class="lineno">  120</span>&#160;<span class="preprocessor">#       define Z80_B            0</span></div><div class="line"><a name="l00121"></a><span class="lineno">  121</span>&#160;<span class="preprocessor">#       define Z80_C            1</span></div><div class="line"><a name="l00122"></a><span class="lineno">  122</span>&#160;<span class="preprocessor">#       define Z80_D            2</span></div><div class="line"><a name="l00123"></a><span class="lineno">  123</span>&#160;<span class="preprocessor">#       define Z80_E            3</span></div><div class="line"><a name="l00124"></a><span class="lineno">  124</span>&#160;<span class="preprocessor">#       define Z80_H            4</span></div><div class="line"><a name="l00125"></a><span class="lineno">  125</span>&#160;<span class="preprocessor">#       define Z80_L            5</span></div><div class="line"><a name="l00126"></a><span class="lineno">  126</span>&#160;<span class="preprocessor">#       define Z80_A            6</span></div><div class="line"><a name="l00127"></a><span class="lineno">  127</span>&#160;<span class="preprocessor">#       define Z80_F            7</span></div><div class="line"><a name="l00128"></a><span class="lineno">  128</span>&#160;</div><div class="line"><a name="l00129"></a><span class="lineno">  129</span>&#160;<span class="preprocessor">#       define Z80_IXH          8</span></div><div class="line"><a name="l00130"></a><span class="lineno">  130</span>&#160;<span class="preprocessor">#       define Z80_IXL          9</span></div><div class="line"><a name="l00131"></a><span class="lineno">  131</span>&#160;<span class="preprocessor">#       define Z80_IYH          10</span></div><div class="line"><a name="l00132"></a><span class="lineno">  132</span>&#160;<span class="preprocessor">#       define Z80_IYL          11</span></div><div class="line"><a name="l00133"></a><span class="lineno">  133</span>&#160;</div><div class="line"><a name="l00134"></a><span class="lineno">  134</span>&#160;<span class="preprocessor">#else</span></div><div class="line"><a name="l00135"></a><span class="lineno">  135</span>&#160;</div><div class="line"><a name="l00136"></a><span class="lineno">  136</span>&#160;<span class="preprocessor">#       define Z80_B            1</span></div><div class="line"><a name="l00137"></a><span class="lineno">  137</span>&#160;<span class="preprocessor">#       define Z80_C            0</span></div><div class="line"><a name="l00138"></a><span class="lineno">  138</span>&#160;<span class="preprocessor">#       define Z80_D            3</span></div><div class="line"><a name="l00139"></a><span class="lineno">  139</span>&#160;<span class="preprocessor">#       define Z80_E            2</span></div><div class="line"><a name="l00140"></a><span class="lineno">  140</span>&#160;<span class="preprocessor">#       define Z80_H            5</span></div><div class="line"><a name="l00141"></a><span class="lineno">  141</span>&#160;<span class="preprocessor">#       define Z80_L            4</span></div><div class="line"><a name="l00142"></a><span class="lineno">  142</span>&#160;<span class="preprocessor">#       define Z80_A            7</span></div><div class="line"><a name="l00143"></a><span class="lineno">  143</span>&#160;<span class="preprocessor">#       define Z80_F            6</span></div><div class="line"><a name="l00144"></a><span class="lineno">  144</span>&#160;</div><div class="line"><a name="l00145"></a><span class="lineno">  145</span>&#160;<span class="preprocessor">#       define Z80_IXH          9</span></div><div class="line"><a name="l00146"></a><span class="lineno">  146</span>&#160;<span class="preprocessor">#       define Z80_IXL          8</span></div><div class="line"><a name="l00147"></a><span class="lineno">  147</span>&#160;<span class="preprocessor">#       define Z80_IYH          11</span></div><div class="line"><a name="l00148"></a><span class="lineno">  148</span>&#160;<span class="preprocessor">#       define Z80_IYL          10</span></div><div class="line"><a name="l00149"></a><span class="lineno">  149</span>&#160;</div><div class="line"><a name="l00150"></a><span class="lineno">  150</span>&#160;<span class="preprocessor">#endif</span></div><div class="line"><a name="l00151"></a><span class="lineno">  151</span>&#160;</div><div class="line"><a name="l00152"></a><span class="lineno">  152</span>&#160;<span class="preprocessor">#define Z80_BC                  0</span></div><div class="line"><a name="l00153"></a><span class="lineno">  153</span>&#160;<span class="preprocessor">#define Z80_DE                  1</span></div><div class="line"><a name="l00154"></a><span class="lineno">  154</span>&#160;<span class="preprocessor">#define Z80_HL                  2</span></div><div class="line"><a name="l00155"></a><span class="lineno">  155</span>&#160;<span class="preprocessor">#define Z80_AF                  3</span></div><div class="line"><a name="l00156"></a><span class="lineno">  156</span>&#160;</div><div class="line"><a name="l00157"></a><span class="lineno">  157</span>&#160;<span class="preprocessor">#define Z80_IX                  4</span></div><div class="line"><a name="l00158"></a><span class="lineno">  158</span>&#160;<span class="preprocessor">#define Z80_IY                  5</span></div><div class="line"><a name="l00159"></a><span class="lineno">  159</span>&#160;<span class="preprocessor">#define Z80_SP                  6</span></div><div class="line"><a name="l00160"></a><span class="lineno">  160</span>&#160;</div><div class="line"><a name="l00161"></a><span class="lineno">  161</span>&#160;</div><div class="line"><a name="l00162"></a><span class="lineno">  162</span>&#160;</div><div class="line"><a name="l00163"></a><span class="lineno">  163</span>&#160;<span class="comment">/* Z80&#39;s flags. */</span></div><div class="line"><a name="l00164"></a><span class="lineno">  164</span>&#160;</div><div class="line"><a name="l00165"></a><span class="lineno">  165</span>&#160;<span class="preprocessor">#define Z80_S_FLAG_SHIFT        7</span></div><div class="line"><a name="l00166"></a><span class="lineno">  166</span>&#160;<span class="preprocessor">#define Z80_Z_FLAG_SHIFT        6</span></div><div class="line"><a name="l00167"></a><span class="lineno">  167</span>&#160;<span class="preprocessor">#define Z80_Y_FLAG_SHIFT        5</span></div><div class="line"><a name="l00168"></a><span class="lineno">  168</span>&#160;<span class="preprocessor">#define Z80_H_FLAG_SHIFT        4</span></div><div class="line"><a name="l00169"></a><span class="lineno">  169</span>&#160;<span class="preprocessor">#define Z80_X_FLAG_SHIFT        3</span></div><div class="line"><a name="l00170"></a><span class="lineno">  170</span>&#160;<span class="preprocessor">#define Z80_PV_FLAG_SHIFT       2</span></div><div class="line"><a name="l00171"></a><span class="lineno">  171</span>&#160;<span class="preprocessor">#define Z80_N_FLAG_SHIFT        1</span></div><div class="line"><a name="l00172"></a><span class="lineno">  172</span>&#160;<span class="preprocessor">#define Z80_C_FLAG_SHIFT        0</span></div><div class="line"><a name="l00173"></a><span class="lineno">  173</span>&#160;</div><div class="line"><a name="l00174"></a><span class="lineno">  174</span>&#160;<span class="preprocessor">#define Z80_S_FLAG              (1 &lt;&lt; Z80_S_FLAG_SHIFT)</span></div><div class="line"><a name="l00175"></a><span class="lineno">  175</span>&#160;<span class="preprocessor">#define Z80_Z_FLAG              (1 &lt;&lt; Z80_Z_FLAG_SHIFT)</span></div><div class="line"><a name="l00176"></a><span class="lineno">  176</span>&#160;<span class="preprocessor">#define Z80_Y_FLAG              (1 &lt;&lt; Z80_Y_FLAG_SHIFT)</span></div><div class="line"><a name="l00177"></a><span class="lineno">  177</span>&#160;<span class="preprocessor">#define Z80_H_FLAG              (1 &lt;&lt; Z80_H_FLAG_SHIFT)</span></div><div class="line"><a name="l00178"></a><span class="lineno">  178</span>&#160;<span class="preprocessor">#define Z80_X_FLAG              (1 &lt;&lt; Z80_X_FLAG_SHIFT)</span></div><div class="line"><a name="l00179"></a><span class="lineno">  179</span>&#160;<span class="preprocessor">#define Z80_PV_FLAG             (1 &lt;&lt; Z80_PV_FLAG_SHIFT)</span></div><div class="line"><a name="l00180"></a><span class="lineno">  180</span>&#160;<span class="preprocessor">#define Z80_N_FLAG              (1 &lt;&lt; Z80_N_FLAG_SHIFT)</span></div><div class="line"><a name="l00181"></a><span class="lineno">  181</span>&#160;<span class="preprocessor">#define Z80_C_FLAG              (1 &lt;&lt; Z80_C_FLAG_SHIFT)</span></div><div class="line"><a name="l00182"></a><span class="lineno">  182</span>&#160;</div><div class="line"><a name="l00183"></a><span class="lineno">  183</span>&#160;<span class="preprocessor">#define Z80_P_FLAG_SHIFT        Z80_PV_FLAG_SHIFT</span></div><div class="line"><a name="l00184"></a><span class="lineno">  184</span>&#160;<span class="preprocessor">#define Z80_V_FLAG_SHIFT        Z80_PV_FLAG_SHIFT</span></div><div class="line"><a name="l00185"></a><span class="lineno">  185</span>&#160;<span class="preprocessor">#define Z80_P_FLAG              Z80_PV_FLAG</span></div><div class="line"><a name="l00186"></a><span class="lineno">  186</span>&#160;<span class="preprocessor">#define Z80_V_FLAG              Z80_PV_FLAG</span></div><div class="line"><a name="l00187"></a><span class="lineno">  187</span>&#160;</div><div class="line"><a name="l00188"></a><span class="lineno">  188</span>&#160;</div><div class="line"><a name="l00189"></a><span class="lineno">  189</span>&#160;</div><div class="line"><a name="l00190"></a><span class="lineno">  190</span>&#160;<span class="comment">/* Z80&#39;s three interrupt modes. */</span></div><div class="line"><a name="l00191"></a><span class="lineno">  191</span>&#160;</div><div class="line"><a name="l00192"></a><span class="lineno">  192</span>&#160;<span class="keyword">enum</span> {</div><div class="line"><a name="l00193"></a><span class="lineno">  193</span>&#160;  Z80_INTERRUPT_MODE_0,</div><div class="line"><a name="l00194"></a><span class="lineno">  194</span>&#160;  Z80_INTERRUPT_MODE_1,</div><div class="line"><a name="l00195"></a><span class="lineno">  195</span>&#160;  Z80_INTERRUPT_MODE_2</div><div class="line"><a name="l00196"></a><span class="lineno">  196</span>&#160;};</div><div class="line"><a name="l00197"></a><span class="lineno">  197</span>&#160;</div><div class="line"><a name="l00198"></a><span class="lineno">  198</span>&#160;</div><div class="line"><a name="l00199"></a><span class="lineno">  199</span>&#160;</div><div class="line"><a name="l00200"></a><span class="lineno">  200</span>&#160;<span class="keyword">struct </span>Z80_STATE {</div><div class="line"><a name="l00201"></a><span class="lineno">  201</span>&#160;  <span class="keywordtype">int</span>               status;</div><div class="line"><a name="l00202"></a><span class="lineno">  202</span>&#160;</div><div class="line"><a name="l00203"></a><span class="lineno">  203</span>&#160;  <span class="keyword">union </span>{</div><div class="line"><a name="l00204"></a><span class="lineno">  204</span>&#160;    <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>   byte[14];</div><div class="line"><a name="l00205"></a><span class="lineno">  205</span>&#160;    <span class="keywordtype">unsigned</span> <span class="keywordtype">short</span>  word[7];</div><div class="line"><a name="l00206"></a><span class="lineno">  206</span>&#160;  } registers;</div><div class="line"><a name="l00207"></a><span class="lineno">  207</span>&#160;</div><div class="line"><a name="l00208"></a><span class="lineno">  208</span>&#160;  <span class="keywordtype">unsigned</span> <span class="keywordtype">short</span>    alternates[4];</div><div class="line"><a name="l00209"></a><span class="lineno">  209</span>&#160;</div><div class="line"><a name="l00210"></a><span class="lineno">  210</span>&#160;  <span class="keywordtype">int</span>               i, r, pc, iff1, iff2, im;</div><div class="line"><a name="l00211"></a><span class="lineno">  211</span>&#160;</div><div class="line"><a name="l00212"></a><span class="lineno">  212</span>&#160;  <span class="comment">/* Register decoding tables. */</span></div><div class="line"><a name="l00213"></a><span class="lineno">  213</span>&#160;</div><div class="line"><a name="l00214"></a><span class="lineno">  214</span>&#160;  <span class="keywordtype">void</span>              * register_table[16];</div><div class="line"><a name="l00215"></a><span class="lineno">  215</span>&#160;  <span class="keywordtype">void</span>              * dd_register_table[16];</div><div class="line"><a name="l00216"></a><span class="lineno">  216</span>&#160;  <span class="keywordtype">void</span>              * fd_register_table[16];</div><div class="line"><a name="l00217"></a><span class="lineno">  217</span>&#160;};</div><div class="line"><a name="l00218"></a><span class="lineno">  218</span>&#160;</div><div class="line"><a name="l00219"></a><span class="lineno">  219</span>&#160;</div><div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="classfabgl_1_1_z80.html">  223</a></span>&#160;<span class="keyword">class </span><a class="code" href="classfabgl_1_1_z80.html">Z80</a> {</div><div class="line"><a name="l00224"></a><span class="lineno">  224</span>&#160;</div><div class="line"><a name="l00225"></a><span class="lineno">  225</span>&#160;<span class="keyword">public</span>:</div><div class="line"><a name="l00226"></a><span class="lineno">  226</span>&#160;</div><div class="line"><a name="l00227"></a><span class="lineno">  227</span>&#160;  <span class="comment">// callbacks</span></div><div class="line"><a name="l00228"></a><span class="lineno">  228</span>&#160;  <span class="keyword">typedef</span> int  (*ReadByteCallback)(<span class="keywordtype">void</span> * context, <span class="keywordtype">int</span> addr);</div><div class="line"><a name="l00229"></a><span class="lineno">  229</span>&#160;  <span class="keyword">typedef</span> void (*WriteByteCallback)(<span class="keywordtype">void</span> * context, <span class="keywordtype">int</span> addr, <span class="keywordtype">int</span> value);</div><div class="line"><a name="l00230"></a><span class="lineno">  230</span>&#160;  <span class="keyword">typedef</span> int  (*ReadWordCallback)(<span class="keywordtype">void</span> * context, <span class="keywordtype">int</span> addr);</div><div class="line"><a name="l00231"></a><span class="lineno">  231</span>&#160;  <span class="keyword">typedef</span> void (*WriteWordCallback)(<span class="keywordtype">void</span> * context, <span class="keywordtype">int</span> addr, <span class="keywordtype">int</span> value);</div><div class="line"><a name="l00232"></a><span class="lineno">  232</span>&#160;  <span class="keyword">typedef</span> int  (*ReadIOCallback)(<span class="keywordtype">void</span> * context, <span class="keywordtype">int</span> addr);</div><div class="line"><a name="l00233"></a><span class="lineno">  233</span>&#160;  <span class="keyword">typedef</span> void (*WriteIOCallback)(<span class="keywordtype">void</span> * context, <span class="keywordtype">int</span> addr, <span class="keywordtype">int</span> value);</div><div class="line"><a name="l00234"></a><span class="lineno">  234</span>&#160;</div><div class="line"><a name="l00235"></a><span class="lineno">  235</span>&#160;  <span class="keywordtype">void</span> setCallbacks(<span class="keywordtype">void</span> * context, ReadByteCallback readByte, WriteByteCallback writeByte, ReadWordCallback readWord, WriteWordCallback writeWord, ReadIOCallback readIO, WriteIOCallback writeIO) {</div><div class="line"><a name="l00236"></a><span class="lineno">  236</span>&#160;    m_context   = context;</div><div class="line"><a name="l00237"></a><span class="lineno">  237</span>&#160;    m_readByte  = readByte;</div><div class="line"><a name="l00238"></a><span class="lineno">  238</span>&#160;    m_writeByte = writeByte;</div><div class="line"><a name="l00239"></a><span class="lineno">  239</span>&#160;    m_readWord  = readWord;</div><div class="line"><a name="l00240"></a><span class="lineno">  240</span>&#160;    m_writeWord = writeWord;</div><div class="line"><a name="l00241"></a><span class="lineno">  241</span>&#160;    m_readIO    = readIO;</div><div class="line"><a name="l00242"></a><span class="lineno">  242</span>&#160;    m_writeIO   = writeIO;</div><div class="line"><a name="l00243"></a><span class="lineno">  243</span>&#160;  }</div><div class="line"><a name="l00244"></a><span class="lineno">  244</span>&#160;</div><div class="line"><a name="l00245"></a><span class="lineno">  245</span>&#160;  <span class="comment">/* Initialize processor&#39;s state to power-on default. */</span></div><div class="line"><a name="l00246"></a><span class="lineno">  246</span>&#160;  <span class="keywordtype">void</span> reset();</div><div class="line"><a name="l00247"></a><span class="lineno">  247</span>&#160;</div><div class="line"><a name="l00248"></a><span class="lineno">  248</span>&#160;  <span class="comment">/* Trigger an interrupt according to the current interrupt mode and return the</span></div><div class="line"><a name="l00249"></a><span class="lineno">  249</span>&#160;<span class="comment">  * number of cycles elapsed to accept it. If maskable interrupts are disabled,</span></div><div class="line"><a name="l00250"></a><span class="lineno">  250</span>&#160;<span class="comment">  * this will return zero. In interrupt mode 0, data_on_bus must be a single</span></div><div class="line"><a name="l00251"></a><span class="lineno">  251</span>&#160;<span class="comment">  * byte opcode.</span></div><div class="line"><a name="l00252"></a><span class="lineno">  252</span>&#160;<span class="comment">  */</span></div><div class="line"><a name="l00253"></a><span class="lineno">  253</span>&#160;  <span class="keywordtype">int</span> IRQ(<span class="keywordtype">int</span> data_on_bus);</div><div class="line"><a name="l00254"></a><span class="lineno">  254</span>&#160;</div><div class="line"><a name="l00255"></a><span class="lineno">  255</span>&#160;  <span class="comment">/* Trigger a non maskable interrupt, then return the number of cycles elapsed</span></div><div class="line"><a name="l00256"></a><span class="lineno">  256</span>&#160;<span class="comment">   * to accept it.</span></div><div class="line"><a name="l00257"></a><span class="lineno">  257</span>&#160;<span class="comment">   */</span></div><div class="line"><a name="l00258"></a><span class="lineno">  258</span>&#160;  <span class="keywordtype">int</span> NMI();</div><div class="line"><a name="l00259"></a><span class="lineno">  259</span>&#160;</div><div class="line"><a name="l00260"></a><span class="lineno">  260</span>&#160;  <span class="keywordtype">int</span> step();</div><div class="line"><a name="l00261"></a><span class="lineno">  261</span>&#160;</div><div class="line"><a name="l00262"></a><span class="lineno">  262</span>&#160;</div><div class="line"><a name="l00263"></a><span class="lineno">  263</span>&#160;  <span class="comment">// CPU registers access</span></div><div class="line"><a name="l00264"></a><span class="lineno">  264</span>&#160;</div><div class="line"><a name="l00265"></a><span class="lineno">  265</span>&#160;  uint8_t readRegByte(<span class="keywordtype">int</span> reg)                { <span class="keywordflow">return</span> state.registers.byte[reg]; }</div><div class="line"><a name="l00266"></a><span class="lineno">  266</span>&#160;  <span class="keywordtype">void</span> writeRegByte(<span class="keywordtype">int</span> reg, uint8_t value)   { state.registers.byte[reg] = value; }</div><div class="line"><a name="l00267"></a><span class="lineno">  267</span>&#160;</div><div class="line"><a name="l00268"></a><span class="lineno">  268</span>&#160;  uint16_t readRegWord(<span class="keywordtype">int</span> reg)               { <span class="keywordflow">return</span> state.registers.word[reg]; }</div><div class="line"><a name="l00269"></a><span class="lineno">  269</span>&#160;  <span class="keywordtype">void</span> writeRegWord(<span class="keywordtype">int</span> reg, uint16_t value)  { state.registers.word[reg] = value; }</div><div class="line"><a name="l00270"></a><span class="lineno">  270</span>&#160;</div><div class="line"><a name="l00271"></a><span class="lineno">  271</span>&#160;  uint16_t getPC()                            { <span class="keywordflow">return</span> state.pc; }</div><div class="line"><a name="l00272"></a><span class="lineno">  272</span>&#160;  <span class="keywordtype">void</span> setPC(uint16_t value)                  { state.pc = value; }</div><div class="line"><a name="l00273"></a><span class="lineno">  273</span>&#160;</div><div class="line"><a name="l00274"></a><span class="lineno">  274</span>&#160;</div><div class="line"><a name="l00275"></a><span class="lineno">  275</span>&#160;<span class="keyword">private</span>:</div><div class="line"><a name="l00276"></a><span class="lineno">  276</span>&#160;</div><div class="line"><a name="l00277"></a><span class="lineno">  277</span>&#160;  <span class="keywordtype">int</span> intemulate(<span class="keywordtype">int</span> opcode, <span class="keywordtype">int</span> elapsed_cycles);</div><div class="line"><a name="l00278"></a><span class="lineno">  278</span>&#160;</div><div class="line"><a name="l00279"></a><span class="lineno">  279</span>&#160;</div><div class="line"><a name="l00280"></a><span class="lineno">  280</span>&#160;  Z80_STATE         state;</div><div class="line"><a name="l00281"></a><span class="lineno">  281</span>&#160;</div><div class="line"><a name="l00282"></a><span class="lineno">  282</span>&#160;  <span class="comment">// callbacks</span></div><div class="line"><a name="l00283"></a><span class="lineno">  283</span>&#160;</div><div class="line"><a name="l00284"></a><span class="lineno">  284</span>&#160;  <span class="keywordtype">void</span> *            m_context;</div><div class="line"><a name="l00285"></a><span class="lineno">  285</span>&#160;</div><div class="line"><a name="l00286"></a><span class="lineno">  286</span>&#160;  ReadByteCallback  m_readByte;</div><div class="line"><a name="l00287"></a><span class="lineno">  287</span>&#160;  WriteByteCallback m_writeByte;</div><div class="line"><a name="l00288"></a><span class="lineno">  288</span>&#160;  ReadWordCallback  m_readWord;</div><div class="line"><a name="l00289"></a><span class="lineno">  289</span>&#160;  WriteWordCallback m_writeWord;</div><div class="line"><a name="l00290"></a><span class="lineno">  290</span>&#160;  ReadIOCallback    m_readIO;</div><div class="line"><a name="l00291"></a><span class="lineno">  291</span>&#160;  WriteIOCallback   m_writeIO;</div><div class="line"><a name="l00292"></a><span class="lineno">  292</span>&#160;</div><div class="line"><a name="l00293"></a><span class="lineno">  293</span>&#160;};</div><div class="line"><a name="l00294"></a><span class="lineno">  294</span>&#160;</div><div class="line"><a name="l00295"></a><span class="lineno">  295</span>&#160;</div><div class="line"><a name="l00296"></a><span class="lineno">  296</span>&#160;};   <span class="comment">// fabgl namespace</span></div><div class="line"><a name="l00297"></a><span class="lineno">  297</span>&#160;</div><div class="line"><a name="l00298"></a><span class="lineno">  298</span>&#160;</div><div class="line"><a name="l00299"></a><span class="lineno">  299</span>&#160;</div><div class="line"><a name="l00300"></a><span class="lineno">  300</span>&#160;</div><div class="line"><a name="l00301"></a><span class="lineno">  301</span>&#160;</div><div class="line"><a name="l00302"></a><span class="lineno">  302</span>&#160;</div><div class="line"><a name="l00303"></a><span class="lineno">  303</span>&#160;</div><div class="ttc" id="namespacefabgl_html"><div class="ttname"><a href="namespacefabgl.html">fabgl</a></div><div class="ttdef"><b>Definition:</b> <a href="canvas_8cpp_source.html#l00036">canvas.cpp:36</a></div></div>
<div class="ttc" id="classfabgl_1_1_z80_html"><div class="ttname"><a href="classfabgl_1_1_z80.html">fabgl::Z80</a></div><div class="ttdoc">Zilog Z80 CPU emulator. </div><div class="ttdef"><b>Definition:</b> <a href="_z80_8h_source.html#l00223">Z80.h:223</a></div></div>
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